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HW/SW partitioning and code generation of embedded control ...
HW/SW partitioning and code generation of embedded control applications on a reconfigurable architecture platform ... This paper addresses the domain of fine and coarse grain HW / SW codesign for Real-Time System On-Chip. We propose a new method for the real-time scheduling and the HW / SW partitioning of multi-rate or aperiodic tasks ......
EPICURE: A partitioning and co-design framework for ...
However, their approach does not target automatic HW/SW partitioning. Compare to previous efforts, the EPICURE project main contribution is to reduce the gap between a formal specification model and the architectural specification through automatic design space exploration and HW/SW partitioning steps.
 EXTENDING THE GCLP ALGORITHM FOR HW/SW PARTITIONING: A ...
cisions, such as architecture selection and HW/SW partition-ing on the highest abstraction level, i.e. the algorithmic de-scription of the system. HW/SW partitioning can in general be described as the mapping of the interconnected functional objects that constitute the behavioural model of the system onto a chosen architecture model....
Preemptive HW/SW-Threading by combining ESL ... - CORE
The HW/SW partitioning is static and cannot adapt to dynamically changing system requirements at runtime. Our contribution to tackle this, is to combine a ESL based HW/SW codesign methodology with a coarse grained reconfigurable System on Chip architecture. We propose this as Preemptive HW/SW-Threading...
Algorithmic aspects for functional partitioning and ...
Hardware/software (HW/SW) partitioning and scheduling are the crucial steps during HW/SW co-design. It has been shown that they are classical combinatorial optimization problems. Due to the possible sequential or concurrent execution of the tasks, HW/SW partitioning and scheduling has become more difficult to solve optimally.
HW/SW Interface Generation Flow Based on Abstract Models ...
In this paper, we present a code generation flow to deploy system applications over hardware architectures based on abstract descriptions. Our approach is defined in two steps: a front-end step which deals with abstract description of the application, the architecture (in extended IP-XACT), the mapping, and a back-end step which incorporates specific platform details necessary for HW/SW ...
IMPROVEMENTS OF THE GCLP ALGORITHM FOR HW/SW PARTITIONING ...
HW/SW partitioning of modern heterogeneous systems, which combine signal processing as well as multimedia ap-plications, is usually performed on a task or process graph representation. As this optimisation problem is known to be NP-hard, existing partitioning techniques rely on heuris-tic methods to traverse the vast search space. The Global
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