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HW/SW Partitioning Approach on Reconfigurable Multimedia ...
HW/SW Partitioning Approach on Reconfigurable Multimedia System on Chip. ... This paper presents a new methodology for hardware/software partitioning on reconfigurable multimedia system on chip ...
Implementation of AVS Jizhun decoder with HW/SW ...
Implementation of AVS Jizhun decoder with HW/SW partitioning on a coarse-grained reconfigurable multimedia system Article in Sciece China. Information Sciences 57(8) · August 2014 with 32 Reads
CiteSeerX — Research Unit CES
And integrate new functionalities that require high performance architectures. In this paper we propose a new framework for hardware/software implementation on reconfigurable multimedia system on chip. Firstly we present a new methodology for HW/SW partitioning of the application based on two steps.
A HW/SW Partitioning Algorithm For Multitask ...
A HW/SW partitioning algorithm in [21] is presented for task partition as software tasks and hardware tasks based on their waiting time and resources availability. A methodology is proposed in [22 ...
 A HW/SW Partitioning Algorithm for Dynamically ...
“ System-On-Chip” has become a reality, and recently ... approaches to HW/SW partitioning model the system based on a template of a CPU and an ASIC [8, 11]. ... a HW/SW co-synthesis approach for partially reconfigurable devices is presented. They do not address multi-context devices. Moreover, this approach which is...
Hybrid algorithms for hardware/software partitioning and ...
Hardware/software (HW/SW) partitioning and scheduling are essential to embedded systems. In this paper, a hybrid algorithm derived from Tabu Search (TS) and Simulated Annealing (SA) is proposed for solving the HW/SW partitioning problem.
An Operating System Infrastructure for Fault-Tolerant ...
In this paper, we will propose new concepts of an operating system (OS) infrastructure for reconfigurable networks that allow to efficiently design fault-tolerant systems. For this purpose, we consider a hardware/software solution that supports dynamic rerouting , hardware and software task migration , hardware/software task morphing , and ...
Improving Software Performance with Configurable Logic ...
A High-Level, Algorithmic Programming Language and Compiler for Reconfigurable Systems. In The 2nd International Workshop on the Engineering of Reconfigurable Hardware/Software Objects (ENREGLE), part of the 2000 International Conference on Parallel and Distributed Processing Techniques and Applications (PDPTA), Las Vegas, NV, June 26–29, 2000.
EXTENDING THE GCLP ALGORITHM FOR HW/SW PARTITIONING: A ...
cisions, such as architecture selection and HW/SW partition-ing on the highest abstraction level, i.e. the algorithmic de-scription of the system. HW/SW partitioning can in general be described as the mapping of the interconnected functional objects that constitute the behavioural model of the system onto a chosen architecture model....
Algorithmic aspects for functional partitioning and ...
Hardware/software (HW/SW) partitioning and scheduling are the crucial steps during HW/SW co-design. It has been shown that they are classical combinatorial optimization problems. Due to the possible sequential or concurrent execution of the tasks, HW/SW partitioning and scheduling has become more difficult to solve optimally.
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